5 Questions to Ask Before Starting Your First Hybrid Assembly Project

Question 1

What Are Your Thermal Requirements?

Every active die generates heat. The substrate's job is to move that heat from the junction to the ambient environment — and if the substrate can't do that job, your die will cook itself into failure.

Start with the basics: what is the die's thermal resistance, expressed as R_th(j-c) (junction-to-case)? Multiply that by the maximum power dissipation to get the temperature rise across the die. Then work outward: what is the thermal resistance of the die attach layer? The substrate itself? The package to ambient? If any of those steps can't keep the junction temperature below its rated maximum (typically 125°C for commercial, 150°C for automotive-grade), you have a thermal problem before you've even picked a substrate.

Thermal via density is a common lever. High thermal via density under the die attach area dramatically improves heat spreading in the plane of the substrate. But there's a mechanical tradeoff: dense thermal vias near the edge of a substrate can cause warpage during sintering or co-firing. The assembly shop needs to know your thermal targets so they can design the via pattern accordingly.

Substrate material choice is where thermal requirements get expensive. Standard alumina (Al₂O₃) has a thermal conductivity of roughly 24 W/m·K — fine for low-power logic die, but completely inadequate for high-power RF transistors or under-hood automotive IGBT modules. When you need real thermal performance, you're looking at:

Material	Thermal Conductivity (W/m·K)	Typical Use	Relative Cost
Alumina (Al2O3)	24	Commercial logic, low-power RF	Baseline
Aluminum Nitride (AlN)	170–180	High-power RF, laser diodes, EV	3–5× alumina
AlSiC	200–220	Under-hood automotive, IGBT modules	5–8× alumina
Diamond (CVD)	1000+	Research / extreme power density	Prohibitive for most builds

One of the most common first-build mistakes is selecting a standard alumina substrate for a high-power application because it's familiar, then discovering that the thermal simulation tells a very different story — after the substrates have already been procured.

Question 2

What's Your Qualification Level?

Qualification level isn't a quality aspiration — it's a specification that drives every process control decision, every documentation requirement, and every cost driver in the build. The four common tiers are:

• Commercial (no screening) — Components are as-received from the die fab. No additional burn-in, no visual inspection toMIL-STD-883, no temperature cycling beyond what's needed to find gross assembly defects. Appropriate for consumer products where field failure costs are low and unit volumes are high.
• Industrial (basic burn-in) — Die may be screened with 168-hour burn-in at elevated temperature. Some level of in-process inspection. Acceptable for industrial controls, communications infrastructure where downtime is costly but repair is feasible.
• MIL-PRF-38534 Class H or K (space/defense) — Full QCI (Qualified Parts List) flow, DPA (Destructive Physical Analysis) on samples from every lot, bond pull and shear testing to MIL-STD-883, X-ray and SEM inspection, hermeticity testing by mass spectrometer or bubble test. Class K is the tightest commercial equivalent to space-grade. This is not an upgrade you add at the end — it requires a QMS (Quality Management System) that's been audited and registered.
• Automotive AEC-Q100 / AEC-Q101 — Die-grade stress testing per AEC guidelines, temperature cycling from -40°C to 125°C or higher, unbiased humidity (HAST), and increasingly, latch-up and ESD characterization. Automotive expects zero defective parts per million (DPPM) in high-safety applications (airbag, ABS, EPS) and <50 DPPM in comfort/safety applications.

The qualification level also determines your substrate supplier qualification requirements. An assembler running MIL-PRF-38534 has to maintain a configuration-controlled quality system — changes to processes, materials, or facilities require customer notification and often re-qualification. For commercial builds, a supplier qualification audit is polite. For space/defense, it's a contractual obligation.

Question 3

Have You Defined Your Interface Standards?

In hybrid assembly, the word "interface" covers everything that touches everything else — and every one of those interfaces has a specification that, if missing, defaults to argument and rework. The critical interfaces are:

Wire Bond Pad Metallurgy

Gold wire (Au) requires Au pad metallization — typically Ti/NiV/Au or similar. Aluminum wire (AlSi or AlMg) requires Al pad metallization. This is not interchangeable. Au wire on Al pads creates intermetallic compounds (AuAl₂, Au₂Al) that grow under thermal cycling, eventually cracking the bond and causing open circuits. Al wire on Au pads is somewhat more forgiving but still creates Kirkendall voiding at the interface. If you specify the wrong metallurgy at the pad design stage, changing it post-layout is a mask respin.

Die Attach Surface Preparation

Die attach (typically silver-filled epoxy or soft solder) requires a surface that's clean, wettable, and roughness within spec. For Agpt epoxy, that means oxygen-plasma cleaned or IPC definition of surface energy. For solder die attach, that means flux-compatible surface and controlled oxide thickness. If you don't specify surface preparation in the assembly drawing, the assembler defaults to whatever they think is reasonable — and that might not match your reliability expectation.

Lid Flatness

Lid flatness is specified as TIR (Total Indicated Runout), typically required to be less than 0.001" across the package seal perimeter. If the lid is warped, the seal will crack — in an unaged sample, at room temperature, before you even get to environmental testing. This tolerance must be on the drawing, communicated to the lid supplier, and verified on incoming lid inspection. It is not optional for hermetic packages.

Solder Alloy and Reflow Profile

For hybrid assemblies with soldered discrete components, the alloy (SAC305, Sn63Pb37, AuSn20, etc.) and the peak temperature / time-above-liquidus must be agreed before the build. The substrate, the die, the lid, and the SMT components all have different thermal budget constraints. A reflow profile that's safe for a 250°C-rated ceramic capacitor may absolutely destroy a thermoset die attach adhesive that cures at 175°C. This coordination is not automatic — it requires a thermal budget review across the entire build.

Question 4

What Are Your Substrate Termination Requirements?

The word "termination" sounds like a packaging detail, but in hybrid assembly it determines the entire assembly methodology. The three dominant formats are:

• Wire bond only — Die active surface faces up; interconnects are made with wire bonds from die pads to substrate metallization. This is the most common format for analog and mixed-signal hybrids. Wire bond pitch is the limiting factor — 2 mil (50 µm) Au wire can be spaced at 35–40 µm pitch with today's wedge bond tools.
• BGA / flip-chip — Die active surface faces down, with solder bump interconnects to the substrate. This eliminates the inductance and capacitance of wire bonds, which matters at multi-GHz frequencies. Flip-chip on ceramic requires underfill between the die and substrate — this is a process step that adds cost, inspection complexity, and thermal resistance that must be accounted for.
• QFN / leadframe-based — Pre-formed leadframe with die attach and wire bond, then mold compound encapsulation. Often considered a separate category from "true" hybrid, but the build process overlaps. QFN assembly on ceramic substrates is increasingly common for power hybrids where the leadframe serves as both electrical interconnect and thermal path.

Beyond the die termination format, the substrate itself may contain buried passives — resistors, capacitors, and inductors built into the substrate layers. This is only possible in LTCC (Low-Temperature Co-fired Ceramic), not in standard alumina thick-film or thin-film substrates. If your design relies on 0402 capacitors embedded in the substrate to save area, you're already committed to LTCC — and LTCC has different design rules, different dielectric constants, and a different supplier base than standard alumina.

For high-Q inductors (important in RF功率 amplifiers at 5–30 GHz), thin-film on alumina is significantly superior to LTCC because the tolerances are tighter and the conductor quality factor (Q) is higher. If you're building a 28 GHz 5G RF front-end module, buried passives in LTCC will cost you performance that the thin-film route wouldn't.

Question 5

Do You Have a Reliability Budget and Failure Mode Analysis?

Reliability is not something you test into a hybrid assembly — it's something you design and process-control into it. The reliability budget starts with the question: what failure rate can the end application tolerate? This determines the entire reliability engineering flow.

Defining Acceptable Failure Rates

Application	Acceptable Failure Rate	Notes
Medical implant (Class III)	Zero failures over device lifetime	Regulatory: FDA PMA / CE MDR; failure mode must be benign (fail-safe)
Automotive safety (airbag, ABS)	<50 DPM field failure	AEC-Q100/Q101; FMEA mandatory; zero-defect programs common
Automotive non-safety	<200 DPM field failure	Comfort electronics, infotainment
Industrial / infrastructure	<500 DPM field failure	Field serviceable; warranty cost drives spec
Commercial / consumer	Up to 1000 DPM	High volume; replace vs. repair economics dominate

Once the acceptable failure rate is defined, you need a DFMEA (Design Failure Mode Effects Analysis) — a structured failure analysis that identifies every credible failure mode, estimates its probability, and assigns a detection method and severity rating. The DFMEA is not a document you write once and file. It's a living document that evolves as you learn from reliability testing results.

Wear-Out Mechanisms

Hybrid assemblies have a set of characteristic wear-out mechanisms that are distinct from PCB assemblies because they involve bare die, wire bonds, and ceramic substrates:

• Wire bond fatigue — Thermal cycling causes differential expansion between the die (silicon CTE ~2.6 ppm/°C), the die attach layer, and the substrate (alumina CTE ~6.5 ppm/°C). Each thermal cycle accumulates plastic deformation in the wire bond heel. After sufficient cycles, the wire cracks at the heel and the circuit opens. Wire bond fatigue is accelerated by high temperature storage and by high current density in power cycling.
• Solder joint cracking — In hybrid assemblies with SMT components on substrate, the solder joints (typically SAC305) fatigue under thermal cycling. The CTE mismatch between the component termination (Kovar or Alloy 42) and the substrate drives the fatigue. Pb-free solders (SAC alloys) have higher creep resistance than eutectic SnPb but also higher Young's modulus, which can increase stress on joints under thermal cycling.
• Via electromigration — At high current densities (>10⁴ A/cm²) in substrate vias, metal atoms migrate in the direction of electron flow, eventually creating voids and open circuits. This is particularly relevant in power hybrid substrates where current flows through Plated-Through-Hole (PTH) vias. Via geometry (aspect ratio, barrel shape) and current density must be co-simulated.
• Die attach degradation — Silver-filled epoxy die attach can migrate silver filaments under high humidity bias (silver migration), creating shorts between adjacent die attach pads. High temperature storage can also cause oxidation of the silver flake in the epoxy, increasing thermal resistance over life. Solder die attach is more stable but has its own voiding risks under thermal cycling.

Reliability Prediction

The standard reliability prediction methodologies are MIL-HDBK-217F (U.S. military) and Telcordia SR-332 (telecom/industrial). Both use part-count and part-stress models to predict failure rate (in FITs — Failures In Time, where 1 FIT = 1 failure per 10⁹ device-hours). These models are not perfect — they were built for discrete components on PCBs, and hybrid assemblies with bare die don't map cleanly — but they provide a consistent basis for comparison and are required by many defense and aerospace procurement specifications.

Bonus Question

Is Your Assembly Partner ITAR and/or AS9100 Registered?

This question often arrives at the worst possible time — usually after a technically excellent build is ready for delivery, at which point you discover that exporting it to your European customer violates ITAR because the assembly was done at a non-registered facility.

ITAR (International Traffic in Arms Regulations, 22 CFR Parts 120–130) governs the export of defense articles and services. If your hybrid assembly contains any components or technical data covered by the USML (United States Munitions List), ITAR compliance is mandatory — and "covered by the USML" includes a surprisingly broad range of rad-hard microelectronics, certain RF components, and technical data about any of the above. ITAR registration (via DDTC — Directorate of Defense Trade Controls) is required for any company that manufactures or exports covered articles, regardless of whether the end customer is domestic or foreign.

AS9100 is a quality management system standard for the aviation, space, and defense industry. It's based on ISO 9001 but adds aviation-specific requirements: configuration management, design control, verification and validation, and traceability. Many Tier-1 aerospace primes (Boeing, Airbus, Lockheed) will not place work with a supplier that lacks AS9100 certification. For hybrid assemblies in aerospace applications — flight control systems, engine monitoring, radar modules — AS9100 is increasingly a gate requirement, not a nice-to-have.

What This Affects Practically

• Who can touch your technical data — ITAR restricts not just the product but the information about it. Emails containing technical data about ITAR-controlled assemblies must be sent through secure channels. Foreign nationals working in non-registered facilities may not have access to ITAR-controlled technical data.
• Export destination — An ITAR-registered assembly partner can legally export covered assemblies to authorized foreign customers. A non-registered partner cannot — regardless of what the end customer needs.
• Subcontracting — AS9100 requires control of outsourced processes. If your assembly partner subcontracts brazing or plating operations, those subcontractors must be qualified and controlled under the assembler's quality system. Uncontrolled subcontracting is a nonconformance in AS9100 audits.